Thomas Yan, our CEO, was interviewed by Wuxi Daily as a representative of knowledge-based economy and high-tech company in Xishan district
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Hybrid emulation is performed where some parts of the system run in the emulator and other parts run in a virtual prototyping. As a byword for early and fast, the technique will be a great assistant to enable early architecture optimization and software development, as well as higher performance for software-driven register-transfer level (RTL) verification.
HyperSilicon provides Hybrid Emulation solutions by combining Qemu tool – the open source virtual prototyping and Semu emulator, and it has been tested to perform well in completing the task of hybrid verification of virtual prototype hardware and embedded software. It provides a more actual and real-time run environment for early architecture optimization, co-development of embedded software and higher performance for RTL emulation, which effectively accelerates the progress of IC design in various fields and the launching of new generation of products.
The growth of the scale and complexity of advanced IC design has brought great challenges to verification. Emulator which runs large-scale RTL designs(DUT) in hardware delivers exponentially higher speed compared to simulators, benefiting from data processing parallelly. More and more development teams choose to deploy emulators to accelerate the verification of large-scale designs.
Semu emulator was researched and developmented based on the concept of “emulation performance at simulation price”, It breaks the functional verification bottleneck by delivering the high-speed of FPGA-based emulation without compromising debug visibility and control.
Today’s designs routinely have millions of gates with memories, transceivers, third party IP and processor cores, Verification tools need to process huge amounts of data with the exponential increase of SoC/ASIC design scale.
Visual Verification Suite is proven softwares for high reliability design which enables engineers to rapidly locate and correct errors, early in the design cycle and finds subtle bugs that can be missed by even the most experienced designers.
VeriTiger®-V19P series is the latest generation of prototyping system from HyperSilicon, using Xilinx Virtex UltraScale+ XCVU19P FPGA which provides the highest logic density and I/O count on a single device ever built by Xilinx.
As a byword for early and fast, the technique will be a great assistant to enable early architecture optimization and software development, as well as higher performance for software-driven register-transfer level (RTL) verification.
Wuxi, China, July 21, 2021-HyperSiliconrelocates it’s headquarters to Wuxi for more resources to develop it’s verification tools and solutions
SAN JOSE, CALIF. –– June 17, 2021 –– SmartDV™ Technologies, the leader in Design and Verification Intellectual Property (IP), today confirmed it is a member of the Xilinx Partner Program and offers Design IP optimized for use on Xilinx FPGAs.
Bluespec, Inc., a founding member of RISC-V International and supplier of RISC-V processor IP and tools, announced that they have joined the Xilinx Partner Program and have released two RISC-V processor families, optimized for use on Xilinx FPGAs.
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