Three Methods to Accelerate Simulation by Emulator!

2022-11-09 Emulator Verification
In the process of emulation, the performance of acceleration changes according to interaction type of Testbench and DUT. There are 3 common types: cycle-based, transaction-based, and synthesizable.

The growth of the scale and complexity of advanced IC design has brought great challenges to verification. Emulator which runs large-scale RTL designs(DUT) in hardware delivers exponentially higher speed compared to simulators, benefiting from data processing parallelly. More and more development teams choose to deploy emulators to accelerate the verification of large-scale designs.

In the process of emulation, the performance of acceleration changes according to interaction type of Testbench and DUT. There are 3 common types: cycle-based, transaction-based, and synthesizable.

Cycled Based Acceleration

Cycled based acceleration runs the DUT on the hardware side and the Testbench on the software side of the emulator, converting and delivering the data according to the specific protocol. In the cycle of interaction, the method in accordance with the time unit promotes each step of the protocol conversion strictly, and uses double handshake for communication confirmation, which will produce a large amount of interaction overhead between software and hardware, so the effect is not very ideal. But it has great flexibility for some non-standard protocol conversion and synchronous clock.

Transaction Based Acceleration

Transaction based acceleration runs the DUT and part of Testbench on the hardware side, and communicates with Testbench that runs on the software side through the transactors, which can deliver the transformation of the non-timing stimilus into temporal stimulus. Because the time spent on the the software side is generally much longer than the clock cycle on the hardware side, when sending a temporal stimulus, the software side needs to spend more time on the temporal building, which may affect the performance of the co-verification platform, and transaction based acceleration can handle well.

Synthesizable Acceleration

Synthesizable acceleration runs DUT and TestBench on the hardware side, which can greatly reduce the communication overhead caused by the interaction between the software and hardware, thus greatly improving the verification speed.

Different interaction methods bring different speedup ratios. Compared to simulation, cycle based acceleration can basically achieve 5-100 times because of the impact of communication overhead, transaction based acceleration can achieve 20-1000 times, especially suitable for various special algorithms, such as: video encoding and decoding, communication chip verification with huge amount of interactive data, etc., and synthesizable acceleration can achieve at least 1000 times, which can provide the most effective emulation method from RTL to bitsream. Users can choose a suitable method according to designs and actual needs to improve verification efficiency.

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